The explosive growth in AI cluster interconnect bandwidth is creating an entirely new class of PCB substrate requirements. When a single AI GPU needs 3.2 Tbps of optical I/O, the PCB substrate hosting the optical engine becomes a precision instrument rather than a commodity board.
This week's announcements—Dongshan Precision's $1.2B investment in AI optical module capacity and AT&S's EUR 2B substrate expansion—confirm this trend is accelerating. Here's what PCB engineers need to know about designing substrates for this emerging market.
Signal Integrity at 56 GBaud: Material Selection
Optical module substrates carry PAM4 signals at 56 GBaud (112 Gbps per lane) from the host interface to the VCSEL driver IC. At these data rates, PCB trace loss is the dominant mechanism between connector and IC.
The critical parameter is dissipation factor (Df) at the Nyquist frequency. For 56 GBaud PAM4, significant spectral content extends to 42 GHz. At 28 GHz:
- Standard FR-4 (Df ~0.020): ~2.5 dB/cm loss in microstrip — a 2cm trace loses 5 dB
- Megtron 6 (Df ~0.006 at 28 GHz): ~0.8 dB/cm — enabling 3-4 cm traces with equalization
- Ultra-low-loss (Df < 0.003): Required for 200G/lane and traces > 4 cm
The hybrid stackup approach—premium material only on the two high-speed signal layers—optimizes cost without compromising performance because microstrip field energy concentrates within the first dielectric layer below the conductor.
Thermal Management: 15W in a 15mm Footprint
A single optical engine (VCSEL array + driver IC) dissipates 10-15W in a 10-15mm footprint, creating 50-70 W/cm2 heat flux. Standard thermal vias achieve 8-12 C/W through 1.6mm boards—at 15W that's a 120-180C rise, well past VCSEL reliability limits.
The solution: embedded copper coins—solid copper slugs press-fit or co-laminated into a PCB cavity. Combined with conductive-filled thermal via rings:
- Thermal resistance drops to 2-3 C/W
- VCSEL junction stays at 70-80C at full power
- Requires precision cavity routing and controlled press-fit interference (25-50 µm/side)
Not every fabricator has this capability—it requires specialized tooling beyond conventional PCB processing.
Impedance Control at Millimeter-Wave Frequencies
A +/-10% impedance tolerance creates 5% reflection at each discontinuity. At 56 GBaud PAM4, these compound across via transitions, trace width changes, and connectors to destroy eye margin.
Production optical module substrates specify +/-5% impedance, with leading designs pushing +/-3%. Achieving this requires:
- Controlled dielectric thickness (premium laminate with tight thickness tolerance)
- Photolithography for trace definition (vs conventional exposure)
- Frequency-domain impedance verification (VNA, not just TDR)
Trace geometry evolves from standard microstrip to ground-backed coplanar waveguide (GCPW) with via fencing at < lambda/4 spacing (< 1.5mm at 50 GHz). The via density adds substantial drill count but is non-negotiable for signal integrity.
Mechanical Precision for Fiber Coupling
The most unusual requirement: PCB fiducial placement accuracy of +/-10 microns for single-mode fiber alignment. Standard PCB achieves +/-50-75 µm. Laser-ablated fiducials referenced to precision tooling pins achieve the required +/-10-15 µm.
Additional mechanical requirements:
- Bow and twist < 0.3%
- Controlled warpage through reflow
- Surface roughness Ra < 0.5 µm on component attach areas
These push the PCB into a regime bridging conventional fabrication and IC substrate processing.
Representative 10-Layer Stackup
| Layer | Function | Material |
|---|---|---|
| L1 | High-speed signal | Megtron 6 |
| L2 | Ground reference | Copper |
| L3 | Power (1.0V) | FR-4 core |
| L4 | Ground isolation | Copper |
| L5 | Low-speed control | FR-4 core |
| L6 | Ground isolation | Copper |
| L7 | Power (3.3V) | FR-4 core |
| L8 | Ground reference | Copper |
| L9 | High-speed signal | Megtron 6 |
| L10 | Ground/thermal | Copper (70 µm) |
Confining expensive Megtron 6 to L1 and L9 reduces material cost by 40-50% versus all-Megtron construction while maintaining identical signal integrity on critical lanes.
Market Context: Why This Matters Now
The AI optical interconnect market is growing from $4B (2025) to $15B+ by 2028. Each 800G transceiver module requires a precision PCB substrate. A 10,000-GPU cluster needs 50,000-100,000 optical modules.
For PCB fabricators, these substrates command $30-80 per piece at volume with 6-12 month qualification cycles creating sticky customer relationships. The technical barrier—low-loss processing, embedded metals, precision measurement, HDI fabrication—limits competition to top-tier manufacturers.
Hardware engineers designing in this space should be thinking about fabricator qualification now, not when prototypes are ready.
Originally published on the AtlasPCB engineering blog. We fabricate precision substrates for optical modules with Megtron 6, embedded copper coins, and HDI microvias. Explore our HDI capabilities.
